I don’t see that happening anytime soon, if ever. Cooling would be an extreme problem.
Medium term, we’ll probably see at least 16 channels and 128+ PCIe lanes and TDPs up to 600-800W in the Venice/Diamond Rapids gen. Should push pin counts to ~9000. Beyond that, it becomes tricky. At a certain point, there’s so much IO you literally cannot fit that many standard DIMMs lined up in a typical ~20in server blade. Will need some way around that.
Long term, optical might be a solution. Have some super high bandwidth optical links on the main package and break out PCIe or whatever else on some external chipset.
I don’t see that happening anytime soon, if ever. Cooling would be an extreme problem.
Medium term, we’ll probably see at least 16 channels and 128+ PCIe lanes and TDPs up to 600-800W in the Venice/Diamond Rapids gen. Should push pin counts to ~9000. Beyond that, it becomes tricky. At a certain point, there’s so much IO you literally cannot fit that many standard DIMMs lined up in a typical ~20in server blade. Will need some way around that.
Long term, optical might be a solution. Have some super high bandwidth optical links on the main package and break out PCIe or whatever else on some external chipset.